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AIRBUS
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Technical Knowledge
39677
With a 10MHz square wave as the clock and J=K=0, what output frequency does a JK flip-flop produce?
### Question Analysis This question is testing your understanding of JK flip-flops, a type of digita...
AIRBUS, Alstom, Arm, ASML, Aurora, Canon, Cisco, Continental, Intel, Lattice Semiconductor, Mercedes-Benz, Raymarine, Renesas Electronics, Skyworks Solutions, Teradyne, Toshiba, Western Digital
Design Verification Engineer
Coding
50732
In what ways is the Tomasulo Algorithm more effective than other scheduling algorithms? Have you used it in your projects? Can you give an example of its implementation and hazard mitigation?
### Question Analysis The question is asking about the **Tomasulo Algorithm**, a dynamic scheduling ...
AIRBUS, Arista Networks, ASUS, Beckman Coulter, Becton Dickinson, Bosch, Cisco Systems, GE Aviation, General Electric, Google, Intel, Lattice Semiconductor, Nuvoton Technology, Philips, Realtek, Renesas Electronics, Rockwell Collins, Rolls-Royce Aerospace, SpaceX
Design Verification Engineer
Coding
9296
In what ways is the Tomasulo Algorithm more effective than other scheduling algorithms? Have you used it in your projects? Can you give an example of its implementation and hazard mitigation?
### Question Analysis The question asks about the effectiveness of the Tomasulo Algorithm compared t...
AIRBUS, Arista Networks, ASUS, Beckman Coulter, Becton Dickinson, Bosch, Cisco Systems, GE Aviation, General Electric, Google, Intel, Lattice Semiconductor, Nuvoton Technology, Philips, Realtek, Renesas Electronics, Rockwell Collins, Rolls-Royce Aerospace, SpaceX
Design Verification Engineer
Technical Knowledge
26216
What's your explanation of setup time and hold time, their violation scenarios, and techniques to mitigate such violations?
### Question Analysis This question is aimed at assessing your understanding of two critical concept...
AIRBUS, Arista Networks, Continental, Ford Motor Company, GE Aviation, General Motors, Google, Leidos, Mentor Graphics, Mercedes-Benz, National Instruments, Novartis, OMRON, Peloton, Rohde & Schwarz, Siemens, SK Hynix, Sony, Yamaha Motor Corporation
Design Verification Engineer
Coding
62781
How would you write a Verilog snippet to set every element of a 10x9 array to 0 at 0ns in an initial block?
### Question Analysis The question asks you to write a Verilog code snippet that initializes a two-d...
Agilent Technologies, AIRBUS, Applied Materials, Beckman Coulter, Bombardier Transportation, Boston Scientific, Ericsson, Lam Research, NETGEAR, Novartis, Peloton, Pratt & Whitney, Raytheon, Rockwell Automation, Seagate Technology, Sharp, Siemens, Texas Instruments
Design Verification Engineer
Technical Knowledge
46433
In what manner would you develop a multi-bit FIFO circuit?
### Question Analysis The question is asking about the development of a multi-bit FIFO (First-In, Fi...
Abbott Laboratories, AIRBUS, Akamai, Apple, BAE Systems, Beckman Coulter, Blue Origin, BMW Group, ByteDance, Cirrus Logic, Corning, Fujitsu, General Electric, General Motors, Harley-Davidson, Honeywell, Infineon, Juul Labs, Kingston Technology, Lockheed Martin, Mentor Graphics, Meta, Microsoft, NEC, OMRON, Philips, Renesas Electronics, Rockwell Collins, Samsung, SpaceX, Teradyne, Texas Instruments, Thermo Fisher Scientific, Toshiba
Design Verification Engineer
Product
6665
Could you walk me through the phases involved in RTL design flow?
### Question Analysis The question is asking for a detailed explanation of the phases involved in th...
AIRBUS, ASML, Canon, Continental, Cruise, Hewlett Packard, Hitachi, Leidos, MediaTek, Mercedes-Benz, Microsoft, Novartis, OMRON, Rolls-Royce Aerospace, Silicon Motion, Sony, STMicroelectronics, Verizon, Xiaomi
Design Verification Engineer
Technical Knowledge
37095
How would you describe scan chains?
### Question Analysis The question is asking for an explanation of "scan chains," which is a concept...
Agilent Technologies, AIRBUS, Amazon Web Services, Amgen, ASUS, Audi, Blue Origin, Dialog Semiconductor, Eaton, Juul Labs, Lattice Semiconductor, Novartis, Panasonic, Philips, Schneider Electric, SpaceX, Varian Medical Systems
Design Verification Engineer
Coding
23207
What is your strategy for implementing a binary to thermometer decoder circuit in Verilog?
### Question Analysis The question is asking for a strategy to implement a binary to thermometer dec...
AIRBUS, ASML, Blue Origin, Cisco Systems, Dell Technologies, Ducati, Hitachi, Lam Research, Mayo Clinic, Microchip Technology, NETGEAR, Novartis, Philips Healthcare, Samsung, Thales, TP-Link, Trimble
Design Verification Engineer
Technical Knowledge
1439
Can you elucidate the layout of a memory array, the usual tasks of a sense amplifier, and the workings of an equilibration circuit?
### Question Analysis The question is asking for a detailed explanation of three technical concepts ...
AIRBUS, Applied Materials, Arm, ASUS, CRRC, D-Link, Eaton, Embraer, Kawasaki Heavy Industries, Legrand, Nokia, Northrop Grumman, Nuvoton Technology, NVIDIA, Philips, Raytheon, Tesla, Texas Instruments, Volkswagen
Design Verification Engineer
Product
9556
I'd like to know how single port/multi-port SRAM/DRAM functions. How do you go about optimizing memory usage and reducing access times?
### Question Analysis The question is technical and focuses on understanding the functionality and o...
AIRBUS, Amgen, Bombardier, Canon, Embraer, Fujikura, General Electric, Honeywell, Infineon, LG Electronics, Marvell, Mitsubishi Electric, Oracle, Palo Alto Networks, Panasonic, Sharp, Siemens, Synopsys, ZTE
Design Verification Engineer
Coding
52335
What is your strategy for implementing a binary to thermometer decoder circuit in Verilog?
### Question Analysis This question is focused on your understanding of digital logic design, partic...
AIRBUS, ASML, Blue Origin, Cisco Systems, Dell Technologies, Ducati, Hitachi, Lam Research, Mayo Clinic, Microchip Technology, NETGEAR, Novartis, Philips Healthcare, Samsung, Thales, TP-Link, Trimble
Design Verification Engineer
Technical Knowledge
25609
In the UVM driver class, what sets the get_next_item() method apart from the get() method?
### Question Analysis The question is asking about two specific methods in the Universal Verificatio...
AIRBUS, Apple, ASUS, Aurora, BAE Systems, Becton Dickinson, Bombardier Transportation, Cirrus Logic, Cisco Systems, Corning, CRRC, Cypress Semiconductor, D-Link, Emerson Electric, FLIR Systems, Fujikura, General Electric, Google, Harley-Davidson, Honeywell, Intel, Lattice Semiconductor, Maxim Integrated, Microsoft, Mitsubishi Electric, NETGEAR, Northrop Grumman, OMRON, ON Semiconductor, Oppo, Peloton, Philips, Pratt & Whitney, Qualcomm, Raymarine, Rockwell Collins, Rolls-Royce Aerospace, Rolls-Royce Holdings, Safran, SK Hynix, Texas Instruments, Vivo, Xiaomi
Design Verification Engineer
Technical Knowledge
1007
In the UVM driver class, what sets the get_next_item() method apart from the get() method?
### Question Analysis The question is asking about the difference between two methods, `get_next_ite...
AIRBUS, Apple, ASUS, Aurora, BAE Systems, Becton Dickinson, Bombardier Transportation, Cirrus Logic, Cisco Systems, Corning, CRRC, Cypress Semiconductor, D-Link, Emerson Electric, FLIR Systems, Fujikura, General Electric, Google, Harley-Davidson, Honeywell, Intel, Lattice Semiconductor, Maxim Integrated, Microsoft, Mitsubishi Electric, NETGEAR, Northrop Grumman, OMRON, ON Semiconductor, Oppo, Peloton, Philips, Pratt & Whitney, Qualcomm, Raymarine, Rockwell Collins, Rolls-Royce Aerospace, Rolls-Royce Holdings, Safran, SK Hynix, Texas Instruments, Vivo, Xiaomi
Design Verification Engineer