Contact

Interview QuestionBank

Your Ultimate Tech Interview Compass
Prepare with confidence using our extensive database of real questions from FAANG and beyond.
Filter
Question Type
Add
Role
Add
Company
Alstom
Add
Technical Knowledge
39677
With a 10MHz square wave as the clock and J=K=0, what output frequency does a JK flip-flop produce?
### Question Analysis This question is testing your understanding of JK flip-flops, a type of digita...
AIRBUS, Alstom, Arm, ASML, Aurora, Canon, Cisco, Continental, Intel, Lattice Semiconductor, Mercedes-Benz, Raymarine, Renesas Electronics, Skyworks Solutions, Teradyne, Toshiba, Western Digital
Design Verification Engineer
Behavioral
32065
What was your most innovative contribution in any project?
### Question Analysis This question is asking you to describe a specific instance where you introduc...
Alstom, Altium, Applied Materials, Bosch Rexroth, Canon, Dell Technologies, Embraer, Ericsson, Farnell, Garmin, Hyundai Mobis, Keysight Technologies, Legrand, Maxim Integrated, Meta, Molex, NEC, NetApp, NETGEAR, NXP Semiconductors, ON Semiconductor, Oracle, Renesas Electronics, Rohde & Schwarz, Safran, Samsung Electronics, Seagate Technology, Silicon Motion, Thales, TP-Link, Western Digital
Design Verification Engineer, Embedded Engineer
Coding
58958
What is your strategy for validating a string as a palindrome?
### Question Analysis The question is asking about a strategy to determine if a given string is a pa...
ABB, Agilent Technologies, Alstom, AMD, Amgen, Belkin, Cirrus Logic, KLA, Leidos, Mayo Clinic, Micron Technology, Oppo, Pratt & Whitney, Samsung, Silicon Labs, STMicroelectronics, Zoox
Design Verification Engineer
Technical Knowledge
5924
Could you explain the concept of an event in Verilog?
### Question Analysis The question is asking for an explanation of the concept of an "event" within ...
Alstom, Arm, Blue Origin, Canon, Continental, Corning, CRRC, Dell, Lockheed Martin, Maxim Integrated, MediaTek, Oracle, Palo Alto Networks, Polaris Industries, Prysmian Group, Skyworks Solutions, Trimble, Verizon, Western Digital
Design Verification Engineer
Technical Knowledge
14180
Could you explain the concept of a counter's modulus and the modulus of a decade counter?
### Question Analysis The question is asking for an explanation of two related concepts in digital e...
Agilent Technologies, Alstom, Arista Networks, Aurora, Bosch, Cirrus Logic, Cruise, HP, Johnson Controls, Keysight Technologies, Microchip Technology, Microsoft, Nuvoton Technology, Philips Healthcare, Qualcomm, Renesas Electronics, Sharp, Skyworks Solutions, Toshiba, Xilinx
Design Verification Engineer
Technical Knowledge
3168
Could you explain the concept of a counter's modulus and the modulus of a decade counter?
### Question Analysis The question asks about two related concepts in digital electronics: the modul...
Agilent Technologies, Alstom, Arista Networks, Aurora, Bosch, Cirrus Logic, Cruise, HP, Johnson Controls, Keysight Technologies, Microchip Technology, Microsoft, Nuvoton Technology, Philips Healthcare, Qualcomm, Renesas Electronics, Sharp, Skyworks Solutions, Toshiba, Xilinx
Design Verification Engineer
Behavioral
15396
How would you handle a colleague who repeatedly shows up late to meetings?
### Question Analysis This question is assessing your ability to handle interpersonal conflicts and ...
Alstom, Arm, ASML, Atlas Copco, Bombardier, Bosch Rexroth, Continental, Dialog Semiconductor, Digi-Key Electronics, General Electric, Honeywell, JTEKT, Lattice Semiconductor, Leidos, Lenovo, Lockheed Martin, Lumentum, Maxim Integrated, MediaTek, Microsoft, Molex, National Instruments, Novartis, Panasonic, Philips, Qualcomm, RS Components, Sharp, Silicon Labs, SK Hynix, Universal Robots, Varian Medical Systems, Waymo, Xilinx
Design Verification Engineer, Embedded Engineer
Technical Knowledge
37646
What common challenges do queues present and how do you propose to solve them?
### Question Analysis This question is asking you to identify and discuss the typical challenges ass...
Adobe, Alstom, Amazon, AMD, BAE Systems, Blue Origin, Corning, Emerson Electric, Ericsson, Hitachi, Intel, Johnson Controls, Lam Research, NEC, Peloton, Prysmian Group, Rolls-Royce Holdings, Schneider Electric, ZTE
Design Verification Engineer
Technical Knowledge
29811
In your own words, how would you describe the difference between blocking and non-blocking assignments in Verilog?
### Question Analysis The question is asking you to explain the differences between two types of ass...
Alstom, Audi, Autodesk, BAE Systems, Boston Scientific, Ericsson, Ford Motor Company, GE Aviation, Intel, Johnson Controls, Keysight Technologies, Lockheed Martin, Microchip Technology, National Instruments, NETGEAR, Raytheon, Trimble
Design Verification Engineer
Coding
49393
Can you explain the process of establishing an SVA in System Verilog to forbid memory operations throughout a power-on-reset?
### Question Analysis The question is asking about the process of using SystemVerilog Assertions (SV...
ABB, Alstom, Amgen, Apple, Audi, Continental, Ericsson, General Motors, Google, Hewlett Packard, Microchip Technology, NETGEAR, ON Semiconductor, Rolls-Royce Holdings, Synopsys, Verizon, Xilinx
Design Verification Engineer
Technical Knowledge
47009
In UVM, what is the objection mechanism and how can one effectively finish a test?
### Question Analysis The question is asking about the objection mechanism in the Universal Verifica...
ABB, Abbott Laboratories, Acer, Agilent Technologies, Alstom, Arm, ASUS, Boston Scientific, Cisco, CRRC, Dell Technologies, Embraer, FLIR Systems, Fujikura, GE Aviation, IBM, Intel, Johnson Controls, Juniper Networks, Lenovo, Mayo Clinic, Mitsubishi Electric, NEC, Nokia, NVIDIA, Polaris Industries, Realtek, Rockwell Collins, Samsung, Silicon Labs, Silicon Motion, Sumitomo Electric, Triumph Motorcycles, Western Digital
Design Verification Engineer
Reset